Enabling reliable low-cost high-capacity flash storage for data centers and hyperscale storage.
Whether you are looking to use an FPGA or an ASIC flash controller to transition to the latest 3D NAND flash memories, our fully scalable and customizable solutions will enable your transition while providing the highest endurance and performance for your storage.
Lowest Resource Usage & Power
Smallest size and power. Lowest LUT and BRAM usage in the industry on an FPGA.
4.8GBytes/sec Throughput & Beyond
Achievable by a single instance on a low-cost FPGA
2-bit Soft Decoding
Uses at most 1-bit soft information for soft-decoding which requires minimal soft reads leading to improved system read latency.
Best-in-class error-correction performance achieved by FAIDTM Technology
Traditional LDPC solutions require large resource usage and power that scales prohibitively with the ever-increasing throughput requirements, and the issue of error floor prevents them from achieving the required low error-rates without adding complexity.
Using a unique patented FAIDTM Technology (which stands for finite alphabet iterative decoding) that was invented based on years’ of research by the founding team, our solutions provide the strongest error-correction with minimal soft reads and no occurrence of error floor.
UBER vs RBER plot for 4KB, R=0.89 code
Our Value Proposition
We provide custom designed proprietary LDPC IP cores that achieve
Can support different code rates or codeword lengths with a core for single instance use or smaller core for multiple instance use.
Customize the solution to any 3D NAND flash memory or target application such as SATA and NVMe.
Scalability to match any throughput vs resource budgets.
Optimized solution for a specific FPGA or ASIC target.